1. Field of the Invention
This invention pertains to digital computer systems and in particular to digital computer systems organized to provide a plurality of working registers in a workspace in the main memory.
2. Description of the Prior Art
In prior art digital computers, a general register-file architecture is implemented. The register file in such a computer is directly controlled and used by the assembly language programmer. The registers are used, in actuality, as a cache memory, local to the processor. However, the user must manually make the decisions as to which values in his program are kept in the register file so as to optimize speed. He must also decide the contents of which registers must be saved and restored during context switching. Both of these decisions are difficult for a human operator and errors result in slow or false operation of the user's program.
To reduce these problems, computers with a memory workspace architecture were developed. The advantages of this type computer is that the context switch overhead is low and also there is simple internal architecture implementation. The result is an architecture that is both fast and simple to implement, which results in a very cost effective computer. However, certain operations such as register-to-register operations are slower with a workspace architecture than with a register-file architecture since workspace registers are actually in main memory and not in the central processing unit (CPU). U.S. Pat. No. 4,067,058 describes workspace architecture.
This invention is of a memory caching technique for workspace registers. Advantage is taken of the fact that the workspace consists of sequential words in memory and that the control state of the CPU is known. The result is a computer with the advantages of a workspace architecture but without the disadvantages of slow register operations.